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Senior Designer

Date Posted: Oct 30, 2026

Job Detail

  • location_on
    Location Bengaluru, Karnataka, India
  • desktop_windows
    Job Type: Full Time/Permanent
  • schedule
    Shift:
  • analytics
    Career Level:
  • group
    Positions:
  • calendar_view_day
    Experience:
  • male
    Gender: No Preference
  • school
    Degree:
  • calendar_month
    Apply Before: Dec 14, 2026

Job Description

Job Summary

Candidates with 3 to 6 years' experience is mandatory 

Good understanding of ASIC/SoC life cycle 

Experience writing ASIC/SoC testplans 

Experience in writing verification strategy document 

UVM based testbench development: 

Experience in ASIC/SoC Testbench definition 

Experience to Build and maintain reusable block-level and sub-system testbenches using SystemVerilog and the Universal Verification Methodology (UVM)." 

Key Responsibilities

C based TB development: 

Experience in developing TB components for SOC with C, SV 

SV functional coverage, Assertions coding      : 

1.Expertise & hands-on experience in OVM/UVM methodologies using SV 

2.Experience to Write, execute, and debug constrained-random and directed test cases based on defined test plans. 

Test case development, coding, execution, bug analysis         : 

1. Experience in developing TB components, including functional coverage implementation and assertion coding 

2. Experience Set up functional coverage, write system assertions (SVA), and analyze code coverage metrics to identify untested gaps in the design logic. 

3.Debug complex simulation failures using waveform viewer tools to isolate design bugs from testbench issues. 

4. Experince in SOC C based tests coding & debugging" 

Skill Requirements

Gate Level Simulation:  

Experience in Gate level simulation & netlist debugging 

Regressions, coverage analysis           

Exeprince in regression failure analayiss 

Functioncal and Code Coverage closure 

Other Requirements

Core Technical Skills    

Languages: Proficiency in Verilog, SystemVerilog, and core concepts of UVM. 

Digital Logic: Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts.  

EDA Tools: Familiarity with industry-standard simulation and debugging tools (e.g., Synopsys VCS, Siemens QuestaSim, Cadence Xcelium/Verdi).  

Protocols: Basic understanding of standard bus protocols like AMBA (AXI, AHB, APB) or peripheral protocols (SPI, I2C, PCIe).  

Scripting: Basic comfort working in a Linux environment and using scripting languages like Python, Tcl, or Perl for automation. 

Source: HCLTech careers — Read the original posting and apply

This role is listed by the employer on its own careers site. Kaam Ki Khoj does not process applications for it.

Company Overview

HCLTech
HCLTech · Noida, Uttar Pradesh, India
10,866 open roles

HCLTech is an employer in the IT/Computers - Software, Software Services sector with operations in India. This is a directory listing maintained by Kaam Ki Khoj so that candidates can find the organisation; it is not an official company page and Kaam... Read More

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