We are seeking an experienced SoC Design-for-Test (DFT) Lead to drive DFT architecture, implementation, verification, and silicon bring-up activities for complex SoCs. The ideal candidate will possess strong expertise in scan compression, ATPG, JTAG/iJTAG, MBIST, and test integration methodologies, while leading cross-functional teams through the complete DFT lifecycle from architecture definition to production test support.
Key Responsibilities
Technical Leadership
DFT Architecture and Implementation
ATPG and Test Development
Test Integration and Debug
Soft Skills
Source: Capgemini careers — Read the original posting and apply
This role is listed by the employer on its own careers site. Kaam Ki Khoj does not process applications for it.
Capgemini openings shown on Kaam Ki Khoj are read directly from the company's own careers site and link back to it. Apply there; Kaam Ki Khoj does not process applications for these roles and is not affiliated with Capgemini. Read More
