About the Unit
TCS IAE is redefining the future of industry by embedding intelligence across engineering, manufacturing, asset, and service value chains. Powered by AI, connected ecosystems, and autonomous operations, it transforms insights into action—creating self-optimizing, resilient, and intelligent enterprises at scale. By seamlessly converging the physical and digital worlds, TCS IAE is enabling a new era of AI-first enterprises where systems continuously learn, adapt, and evolve—driving measurable outcomes and shaping how industries operate for the future.
Role: Design For Test (DFT)
Roles & Responsibilities
· Plan and implement DFT architectures for ASIC/SoC designs
· Insert and validate scan chains, scan compression, and test modes
· Generate and analyze ATPG patterns for various fault models
· Implement and debug MBIST/LBIST and memory repair flows
· Perform DFT simulations and debug test coverage issues
· Collaborate with PD, STA, and Validation teams for test-friendly closure
· Support silicon bring-up, wafer sort, and production test readiness
Tools & Skills
· DFT Tools: Siemens Tessent, Cadence Modus, Synopsys DFTMAX
· ATPG: Stuck-at, Transition, Path Delay, Bridging fault models
· Standards: IEEE 1149.1 (JTAG), IEEE 1687 (IJTAG)
· Simulation: VCS, Questa, NCsim
· Verification: LEC (Conformal), Lint/CDC tools
· Scripting: Tcl (mandatory), Perl / Python / Shell
About the roleSource: Tata Consultancy Services careers — Read the original posting and apply
This role is listed by the employer on its own careers site. Kaam Ki Khoj does not process applications for it.
Tata Consultancy Services is an employer in the IT/Computers - Software, Software Services sector with operations in India. This is a directory listing maintained by Kaam Ki Khoj so that candidates can find the organisation; it is not an official com... Read More
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